This invention relates to a socket used for a semiconductor device and a testing apparatus equipped with the socket and, more particularly, to a socket appropriate to a ball- grid- array package for a semiconductor device and a testing apparatus equipped with the socket connected to a testing circuit through dual-transmission lines.
FIG. 1 illustrates a typical example of the testing system used for semiconductor devices, and the equivalent circuit thereof is shown in FIG. 2. The prior art testing system largely comprises a testing apparatus 20, a socket and a printed wiring board 45. The printed wiring board 45 is provided between the testing apparatus 20 and the socket 40, and a semiconductor device 50 is connected to the socket 40.
The testing apparatus 20 includes a coaxial cable containing a plurality of signal lines 30 and a testing circuit 31. The testing circuit includes a plurality of drivers D1, D2 . . . and Dn and a plurality of receivers R1, R2, . . . and Rn.
The signal lines 30 arc broken down into two groups. The drivers D1, D2, . . . and Dn are respectively connected to the signal lines 30 of the first group which in turn are connected to conductive lines on the printed wiring board 45. The other conductive lines on the printed wiring board 45 arc connected to the signal lines 30 of the second group, and the signal lines 30 of the second group in turn are connected to the receivers R1, R2, . . . and Rn. The drivers D1, D2, . . . and Dn are respectively paired with the receivers R1, R2, . . . and Rn, and, accordingly, the signal lines 30 of the first group are respectively paired with the signal lines 30 of the second group. The signal lines 30 of the first group and the signal lines 30 of the second group are hereinbelow referred to as xe2x80x9csignal line pairsxe2x80x9d, and the signal line pairs are also labeled with reference numeral 30.
A pair of conductive lines 46 on the printed board 45 is connected to one of the signal line pairs 30. The socket 40 has a housing 47 and plural contacts 48. The housing 47 is formed of insulating material. A large recess is formed in the housing 47, and is open to the top surface of the housing 47. The large recess is narrowed in the housing 47, and the semiconductor device 50 is received in the large recess. Plural small recesses are further formed in the housing 47, and are open to the bottom surface of the housing 47. The large recess is connected through pairs of slits to the small recesses.
The contacts 48 are identical in structure with one another, and each of the contacts 48 has a boss portion and a pair of contact leaves A1/B1, A2/B2, . . . An/Bn. The plural contacts 48 are snugly received in the small recesses, respectively, and the pairs of contact leaves A1/B1, A2/B2, . . . and An/Bn project into the large recess. The pairs of conductive lines 46 are respectively associated with the plural contacts 48. One of the conductive lines of each pair 46 is connected to the contact leaf A1, A2, . . . or An of associated one of the contact 48, and the other of the conductive lines of the pair 46 is connected to the other contact leaf B1, B2, . . . or Bn of the same contact 48. Thus, the plural drivers D1, D2, . . . and Dn are electrically connected through the signal lines 30 of the first group 30 and the associated conductive lines 46 to the plural contact leaves A1, A2, . . . and An, and the drivers D1, D2, . . . and Dn, the signal lines 30 of the first group, the associated conductive lines 46 and the contact leaves A1, A2, . . . and form transmission lines for a driver system. On the other hand, the other contact leaves B1, B2, . . . and Bn are connected through the other conductive lines and the signal lines 30 of the second group 30 to the receivers R1, R2, . . . and Rn, respectively, and the contact leaves B1, B2, . . . and Bn, the other conductive lines 46, the signal lines 30 of the second group and the receivers R1, R2, . . . and Rn form transmission lines for a receiver system. The transmission lines for the driver system are electrically connected to the transmission lines for the receiver system through the boss portions encircled in ellipses in FIG. 1 as well as the solder balls 51, and form plural dual transmission lines DTL1, DTL2, . . . and DTLn.
The semiconductor device includes a semiconductor chip (not shown) sealed in a package and ball grid array 51 formed on the bottom surface of the package. The ball grid array 51 has a plurality of solder balls, which are also labeled with reference numeral 51. The solder balls 51 are laid on a grid pattern on the bottom surface of the package. The semiconductor chip is electrically connected to the solder balls 51 of the ball grip array 51, and is communicable with the testing system through the ball grip array 51.
The solder balls 51 are equal in number to the contacts 48, and the contacts 48 are arranged in the pattern same as the ball grip array 51. When the semiconductor device 50 is received in the socket 40, the solder balls 51 are respectively aligned with the pairs of contact leaves A1/B1. The semiconductor device 50 is pressed against the socket 40. Then, the solder balls 51 expand the associated pairs of contact leaves A1/B1, and are inserted into the gaps formed in the pairs of contact leaves A1/B1, respectively.
One of the dual transmission lines DTL1, DTL2, . . . and DTLn is shown in FIG. 2. The dual transmission line shown in FIG. 2 stands for any one of the dual transmission lines DTL1, DTL2, . . . and DTLn, and is labeled with xe2x80x9cDTLxe2x80x9d. The driver and the receiver in the dual transmission line DTL arc respectively labeled with xe2x80x9cDxe2x80x9d and xe2x80x9cRxe2x80x9d. The transmission line for the driver system is short circuited with the transmission line for the receiver system at the boss portion of the associated contact 48, and the boss portion serves as a neutral point 32 of the dual transmission line DTL. Reference xe2x80x9cLSxe2x80x9d is representative of the inductance of the socket 40, and reference xe2x80x9cCixe2x80x9dstands for the input impedance of the semiconductor device 50.
When the drivers D1, D2, . . . and Dn output input signals SIN1, SIN2, . . . and SINn, respectively, the signal lines 30 of the first group, the associated conductive lines 46 and the contact leaves A1, A2, . . . and An propagate the input signals SIN1, SIN2, . . . and SINn to the solder balls 51, respectively. Reference xe2x80x9cSINxe2x80x9d stands for the input signal SIN1, SIN2, . . . or SINn propagated through the dual transmission line DTL. The input signals SIN1, SIN2, and SINn are taken into the semiconductor chip of the semiconductor device 50. Since the transmission lines for the driver system arc respectively connected to the transmission lines for the receiver system at the neutral points 32, the input signals SIN1, SIN2 . . . and SINn enter the transmission lines for the receiver system, and the conductive lines 46 and the signal lines 30 of the second group propagate the input signals SIN1 to the receivers R1, R2 . . . and Rn, respectively, and the input signals SIN1, SIN2 . . . and SINn are sunk into a terminating circuit (not shown).
When the semiconductor chip of the semiconductor device 50 outputs output signals SOUT1, SOUT2 . . . and SOUTn to the solder balls 51 the contact leaves B1, B2, . . . and Bn, the associated conductive lines 46 and the signal lines 30 of the second group propagate the output signals SOUT1, SOUT2, and SOUTn to the receivers R1, R2 . . . and Rn, respectively. Reference xe2x80x9cSOUTxe2x80x9d also stands for the output signals SOUT1, SOUT2 . . . and SOUTn in FIG. 2. However, the output signals enters the transmission lines for the driver system through the neutral points 32, and the conductive lines 46 and the signal lines 30 of the second group propagate the output signals SOUT1, SOUT2 . . . and SOUTn to the drivers D1, D2 . . . and Dn, respectively. The output signals SOUT1, SOUT2 . . . and SOUTn are sunk into the terminating circuit.
The ball- grid- array package is less connectable to the prior art testing system rather than the TSOP package, and a standard connector tends to fail to catch the solder balls 51. The socket with the contact leaves A1/B1, A2/B2, . . . and An/Bn is better than the standard connector, and is used for testing a semiconductor integrated circuit sealed in the ball- grip- array package. However, a problem is encountered in the prior art testing system in that the waveform of a high-frequency signal equal to or greater than 800 megabit/second is deformed due to the inductance LS of the socket 40. This means that the high-frequency signal does not reach the semiconductor integrated circuit at a target time. For this reason, the prior art testing system can not accurately diagnose the semiconductor device in so far as the semiconductor integrated circuit is connected to the prior art testing apparatus 20 through the prior art socket 40.
It is therefore an important object of the present invention to provide a socket, which transfers a high- frequency signal of the order of hundreds mega-bits per second between a semiconductor device and a testing apparatus without deformation of the waveform.
It is also an important object of the present invention to provide a testing system which is equipped with the socket.
To accomplish the object, the present invention proposes to make each terminal of a semiconductor device serve as a neutral point of a dual transmission line.
In accordance with one aspect of the present invention, there is provided a socket for connecting at least one dual transmission line to a terminal of a semiconductor device comprising a case, an input contact piece supported by the case, connected between the at least one dual transmission line and the terminal for supplying an input signal to the terminal and having a first parasitic inductance coupled thereto, and an output contact piece supported by the case in such a manner as to be electrically isolated from the input contact piece, having a second parasitic inductance coupled thereto and equal in value to the first parasitic inductance and connected between the at least one dual transmission line and the terminal for transferring an output signal from the terminal to the at least one dual transmission line.
In accordance with another aspect of the present invention, there is provided a testing system for a semiconductor device equipped with at least one terminal comprising a testing apparatus including a first signal path and a second signal path, a socket including a case for receiving the semiconductor device, an input contact piece supported by the case, connected to the at least one terminal and having a first parasitic inductance coupled thereto and an output contact piece supported by the case in such a manner as to be electrically isolated from the input contact piece, having a second parasitic inductance coupled thereto and equal in value to the first parasitic inductance and connected to the terminal and a wiring board including at least two signal lines connected between the first signal path and the terminal for transferring an input signal from the first signal path to the input contact piece and between the second signal path and the terminal for transferring an output signal from the output contact piece to the second signal path, respectively, the first signal path, the input contact piece and one of the at least two signal lines connected therebetween form a first transmission line for the input signal, and the second signal path, the output contact piece and the other of the at least two signal lines connected therebetween form a second transmission line, which in turn forms a dual transmission line together with the first transmission line.